AEACTS OF EVOLUTION

COMPANIES · CHIP EQUIPMENT

Synopsys

Provides software and intellectual property used to design and verify chips and complex systems.

EnablerChip equipment

C011 · Public · NASDAQ: SNPS · Profile evidence reviewed

What it does

Provides software and intellectual property used to design and verify chips and complex systems.

Why it matters

Its chip-design software is used to design many of the advanced logic chips that power AI systems, including NVIDIA's.

How it makes money

Licenses electronic design automation (EDA) software and semiconductor IP to chip designers.

Geography

United States

AI stack position

Semiconductor manufacturing equipment. The highly specialized machines and design software used to create advanced chips in the first place. Without these tools, no chip maker in the world — including the ones building NVIDIA's chips — could produce anything.

Competitors
Cadence Design Systems

Connections (12)

Every connection below is tied to a readable source, date, classification and statement of its limits. A company source establishes what that company stated; it does not necessarily provide independent confirmation.

Current relationships (10)

AMD tests agentic EDA workflows from Synopsys
Uses technology fromCurrent
AMD is evaluating new Synopsys agentic AI EDA workflows delivered via Microsoft Discovery, including autonomous debug-closure and implementation tools, to accelerate design of next-generation AMD silicon.

Source: 2026-07-27 · reviewed 2026-09-20

Evidence: Primary-source statement · Active collaboration announced; AMD described as testing/evaluating the workflows, not yet full production deployment

Limits: Confirms AMD is testing these specific agentic workflows with an on-record AMD executive quote; does not establish exclusivity, contract value, or that AMD uses Synopsys tools for all of its chip designs.

Synopsys Advances Agentic AI Chip Design with AMD and Microsoft ↗
Synopsys co-develops agentic AI chip-design workflows with AMD
Co-develops withCurrent
Synopsys, AMD and Microsoft jointly developed autonomous agentic-AI EDA workflows on Microsoft's Discovery platform; AMD is evaluating the workflows to accelerate development of its next-generation products, with early results showing 25-40% reductions in debug cycle time.

Source: 2026-07-27 · reviewed 2026-09-22

Evidence: Primary-source statement · Reported operating

Limits: AMD describes this as active evaluation, not confirmed production deployment; no financial terms are disclosed.

Synopsys Advances Agentic AI Chip Design with AMD and Microsoft ↗
Synopsys co-develops agentic AI chip-design workflows with Microsoft
Co-develops withCurrent
Synopsys and Microsoft jointly developed autonomous agentic-AI chip-design workflows, made available for evaluation on Microsoft's Discovery platform, as part of a three-way collaboration that also includes AMD.

Source: 2026-07-27 · reviewed 2026-09-22

Evidence: Primary-source statement · Reported operating

Limits: Describes an evaluation-stage platform collaboration; does not disclose revenue, licensing terms, or production usage by Microsoft's own chip teams.

Synopsys Advances Agentic AI Chip Design with AMD and Microsoft ↗
Synopsys co-develops certified design flows with Intel Corporation
Co-develops withCurrent
Synopsys and Intel Foundry certified AI-powered EDA design flows for Intel's 14A process node, combining design implementation tools with multiphysics analysis, and extended Synopsys's 3DIC Compiler to support Intel's EMIB and EMIB-T advanced-packaging technologies.

Source: 2026-07-27 · reviewed 2026-09-22

Evidence: Primary-source statement · Reported operating

Limits: Certification and roadmap collaboration; Intel 14A is not yet in high-volume production, and no dollar figures are disclosed.

Synopsys and Intel Foundry Fast-Track Customer Readiness from Silicon to Systems on Intel 14A ↗
Samsung Electronics uses certified design tools and IP from Synopsys
Uses technology fromCurrent
Samsung Foundry and Synopsys announced expanded co-innovation across Samsung's 2nm-class, 4nm/5nm and 8nm/14nm process nodes, including AI-powered EDA tools, multiphysics signoff, interface IP and 3D multi-die hybrid copper bonding solutions, reporting up to 20% test-efficiency gains.

Source: 2026-05-28 · reviewed 2026-09-20

Evidence: Primary-source statement · Active, longstanding co-innovation partnership reaffirmed at SAFE Forum 2026

Limits: Describes a longstanding co-innovation partnership and specific process-node tool certification with quoted efficiency figures; does not disclose license revenue, exclusivity, or independently verify the 20% figure beyond the companies' own claim.

Synopsys Advances Power and Performance for AI and Multi-Die Designs on Latest Samsung Foundry Processes at SAFE Forum 2026 ↗
Synopsys co-develops EDA flows and IP for Intel Corporation
Partners withCurrent
Synopsys and Intel Foundry jointly announced production-ready EDA design flows, an expanded IP portfolio and 3DIC Compiler packaging support optimized for the Intel 18A and 18A-P process nodes, and joint membership in Intel's Foundry Accelerator Design Services Alliance and Chiplet Alliance.

Source: 2025-04-29 · reviewed 2026-09-20

Evidence: Primary-source statement · Active, production-ready tool/IP qualification announced jointly by both companies

Limits: Confirms tool and IP qualification and alliance membership; does not disclose the volume or value of chips actually designed using these flows.

Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies ↗
ASML co-develops computational lithography software with Synopsys
Co-develops withCurrent
ASML, NVIDIA, TSMC and Synopsys jointly announced a computational lithography partnership in which Synopsys integrates NVIDIA's cuLitho into its optical proximity correction (OPC) software running on ASML's platforms, cutting OPC compute time from weeks to days.

Source: 2023-03-21 · reviewed 2026-09-22

Evidence: Primary-source statement · Reported operating

Limits: Describes a joint technology announcement, not a specific supply or licensing contract between ASML and Synopsys, and discloses no financial terms.

NVIDIA, ASML, TSMC and Synopsys Set Foundation for Next-Generation Chip Manufacturing ↗
Microsoft provides cloud infrastructure to Synopsys
Provides infrastructure toCurrent
Microsoft named Synopsys its preferred partner for EDA in the cloud; Synopsys Cloud runs on Microsoft Azure infrastructure to deliver pay-per-use electronic design automation services to chip-design teams.

Source: 2022-03-30 · reviewed 2026-09-22

Evidence: Primary-source statement · Reported operating

Limits: Describes a cloud-hosting and go-to-market partnership; does not disclose revenue share, contract length, or Azure capacity reserved for Synopsys Cloud.

Accelerate silicon design innovation on Azure with Synopsys Cloud ↗
TSMC certifies its process technology for design tools from Synopsys
Uses technology fromCurrent
Synopsys's digital and custom design platforms were certified for TSMC's N3 (3-nanometer) process technology, allowing chip designers to use Synopsys tools to design chips for that TSMC node.

Source: 2021-05-26 · reviewed 2026-09-22

Evidence: Primary-source statement · Reported operating

Limits: Certification of design tools for a process node does not indicate how many chips are actually taped out with these tools, deal value, or exclusivity versus other EDA vendors.

Synopsys Digital and Custom Design Platforms Certified for TSMC's Latest 3nm Process Technology ↗
SK hynix uses debug software from Synopsys
Uses technology fromCurrent
SK hynix adopted Synopsys's Verdi debug platform to accelerate its memory-chip development productivity.

Source: 2014-10-27 · reviewed 2026-09-22

Evidence: Primary-source statement · Reported operating

Limits: A 2014 tool-adoption announcement; does not establish that SK hynix still uses this specific Synopsys tool today.

SK Hynix Accelerates Memory Development with Productivity-Enhancing Debug Apps on Synopsys Verdi ↗

Dated or announced (1)

Synopsys plans software acceleration using NVIDIA
Uses technology fromDated / announced
Plans to accelerate engineering software with Blackwell.

Source: 2024-03-18 · reviewed 2026-09-17

Evidence: Primary-source statement · Announced plan

Limits: Does not prove this vendor designed NVIDIA chips.

NVIDIA Blackwell platform announcement ↗

Comparisons (1)

Synopsys competes with Cadence Design Systems
Competes withComparison only
Synopsys and Cadence are the two dominant electronic design automation (EDA) vendors and compete directly for advanced-node chip-design tool share; industry analysis describes Cadence gaining share against Synopsys through 2026 in areas it historically trailed, such as digital full-flow design.

Source: 2026-05-21 · reviewed 2026-09-22

Evidence: Analytical comparison · Reported operating

Limits: Market-share figures are this analyst's estimates, not disclosed by either company, and describe a shifting competitive position rather than a fixed, verified share.

EDA Market Primer ↗
Evidence for this profile

Synopsys investor FAQ ↗
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